There is increasing interest in using high-speed serial data signaling for communication among devices such as integrated circuits. Some protocols for such communication require the use of several serial channels in parallel. Each channel may include several components that are very sensitive to noise in their power supply signals. One possible way to address this problem is to provide a separate power supply for each such noise-sensitive component. However, this can lead to a requirement for unacceptably large numbers of separate power supplies, especially for devices having large numbers of channels for high-speed serial communication.
An additional problem that may arise in integrating high-speed serial transceivers into programmable logic devices (“PLDs”) and similar circuitry is the need to separate PLD logic power supplies and their associated noise from sensitive analog power supplies of the transceivers.